From b1219f8e7830430cb133e8f100a3674358fa37c4 Mon Sep 17 00:00:00 2001 From: fzzinchemical Date: Mon, 20 Oct 2025 11:41:41 +0200 Subject: [PATCH] vault backup: 2025-10-20 11:41:41 --- .obsidian/plugins/obsidian-git/data.json | 58 ------------------------ .obsidian/workspace.json | 11 ++--- Semester 7/REDIG/Vorlesung 2.md | 37 +++++++++++++++ 3 files changed, 42 insertions(+), 64 deletions(-) create mode 100644 Semester 7/REDIG/Vorlesung 2.md diff --git a/.obsidian/plugins/obsidian-git/data.json b/.obsidian/plugins/obsidian-git/data.json index 7cdd8c1..e69de29 100755 --- a/.obsidian/plugins/obsidian-git/data.json +++ b/.obsidian/plugins/obsidian-git/data.json @@ -1,58 +0,0 @@ -{ - "commitMessage": "vault backup: {{date}}", - "commitDateFormat": "YYYY-MM-DD HH:mm:ss", - "autoSaveInterval": 90, - "autoPushInterval": 1, - "autoPullInterval": 45, - "autoPullOnBoot": false, - "disablePush": false, - "pullBeforePush": true, - "disablePopups": false, - "disablePopupsForNoChanges": false, - "listChangedFilesInMessageBody": false, - "showStatusBar": true, - "updateSubmodules": false, - "syncMethod": "merge", - "customMessageOnAutoBackup": false, - "autoBackupAfterFileChange": true, - "treeStructure": false, - "refreshSourceControl": true, - "basePath": "", - "differentIntervalCommitAndPush": false, - "changedFilesInStatusBar": false, - "showedMobileNotice": true, - "refreshSourceControlTimer": 7000, - "showBranchStatusBar": true, - "setLastSaveToLastCommit": false, - "submoduleRecurseCheckout": false, - "gitDir": "", - "showFileMenu": true, - "authorInHistoryView": "hide", - "dateInHistoryView": false, - "lineAuthor": { - "show": false, - "followMovement": "inactive", - "authorDisplay": "initials", - "showCommitHash": false, - "dateTimeFormatOptions": "date", - "dateTimeFormatCustomString": "YYYY-MM-DD HH:mm", - "dateTimeTimezone": "viewer-local", - "coloringMaxAge": "1y", - "colorNew": { - "r": 255, - "g": 150, - "b": 150 - }, - "colorOld": { - "r": 120, - "g": 160, - "b": 255 - }, - "textColorCss": "var(--text-muted)", - "ignoreWhitespace": false, - "gutterSpacingFallbackLength": 5, - "lastShownAuthorDisplay": "initials", - "lastShownDateTimeFormatOptions": "date" - }, - "autoCommitMessage": "vault backup: {{date}}" -} \ No newline at end of file diff --git a/.obsidian/workspace.json b/.obsidian/workspace.json index 2e33813..7260025 100755 --- a/.obsidian/workspace.json +++ b/.obsidian/workspace.json @@ -13,12 +13,12 @@ "state": { "type": "markdown", "state": { - "file": "Semester 7/INKOM/Vorlesung 1.md", + "file": "Semester 7/REDIG/Vorlesung 2.md", "mode": "source", "source": false }, "icon": "lucide-file", - "title": "Vorlesung 1" + "title": "Vorlesung 2" } } ] @@ -78,8 +78,7 @@ } ], "direction": "horizontal", - "width": 300, - "collapsed": true + "width": 300 }, "right": { "id": "ea490c4c2ec9782b", @@ -184,8 +183,9 @@ }, "active": "d561030619edca73", "lastOpenFiles": [ - "Semester 7/Medienheorie/Vorlesung 1.md", "Semester 7/INKOM/Vorlesung 1.md", + "Semester 7/REDIG/Vorlesung 2.md", + "Semester 7/Medienheorie/Vorlesung 1.md", "Semester 7/INKOM", "Semester 7/Bildverarbeitung/Vorlesung 1.md", "Semester 7/Medienheorie", @@ -217,7 +217,6 @@ "Dayplanner/2024-01-27.md", "Dayplanner/2024-01-25.md", "Dayplanner", - "Semester 6/COMARCH/Zusammenfassung/Vorlesung 5.md", "Semester 6/COMARCH/Zusammenfassung", "Semester 6/COMARCH" ] diff --git a/Semester 7/REDIG/Vorlesung 2.md b/Semester 7/REDIG/Vorlesung 2.md new file mode 100644 index 0000000..696e133 --- /dev/null +++ b/Semester 7/REDIG/Vorlesung 2.md @@ -0,0 +1,37 @@ +# VHDL + +Basis 3 Board oder Basis 2 Board +Vivado wird im Labor verwendet, installationsvorgaben sind in Aulis vorzufinden + +In der Übung heute VHDL ausprobieren + +folgende List ist nicht vollständig und repräsentiert nur das durch Herrn Bredereke präsentierte Projekt () +## Typen +- character +- string +- integer +## Datenformate + +`type is (a, b, c);` +`type is array();` +`type is record ... end record;` + +`constant : := ` + +## Schnittstellen +```vhdl +entity is + port(); +end ; +``` + +## Objekte +``` vhdl +constant : := (); +``` + +## Zuweisung +```vhdl +constant : integer := 0 --deklaration + <= 1 --variabeländerung +```