133 lines
4.7 KiB
XML
Executable File
133 lines
4.7 KiB
XML
Executable File
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<project source="3.8.0" version="1.0">
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This file is intended to be loaded by Logisim-evolution v3.8.0(https://github.com/logisim-evolution/).
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<lib desc="#Wiring" name="0">
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<tool name="Pin">
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<a name="appearance" val="classic"/>
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</tool>
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</lib>
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<lib desc="#Gates" name="1"/>
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<lib desc="#Plexers" name="2"/>
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<lib desc="#Arithmetic" name="3"/>
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<lib desc="#Memory" name="4"/>
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<lib desc="#I/O" name="5"/>
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<lib desc="#TTL" name="6"/>
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<lib desc="#TCL" name="7"/>
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<lib desc="#Base" name="8"/>
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<lib desc="#BFH-Praktika" name="9"/>
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<lib desc="#Input/Output-Extra" name="10"/>
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<lib desc="#Soc" name="11"/>
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<main name="main"/>
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<options>
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<a name="gateUndefined" val="ignore"/>
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<a name="simlimit" val="1000"/>
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<a name="simrand" val="0"/>
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</options>
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<mappings>
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<tool lib="8" map="Button2" name="Poke Tool"/>
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<tool lib="8" map="Button3" name="Menu Tool"/>
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<tool lib="8" map="Ctrl Button1" name="Menu Tool"/>
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</mappings>
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<toolbar>
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<tool lib="8" name="Poke Tool"/>
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<tool lib="8" name="Edit Tool"/>
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<tool lib="8" name="Wiring Tool"/>
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<tool lib="8" name="Text Tool"/>
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<sep/>
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<tool lib="0" name="Pin"/>
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<tool lib="0" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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</tool>
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<sep/>
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<tool lib="1" name="NOT Gate"/>
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<tool lib="1" name="AND Gate"/>
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<tool lib="1" name="OR Gate"/>
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<tool lib="1" name="XOR Gate"/>
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<tool lib="1" name="NAND Gate"/>
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<tool lib="1" name="NOR Gate"/>
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<sep/>
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<tool lib="4" name="D Flip-Flop"/>
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<tool lib="4" name="Register"/>
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</toolbar>
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<circuit name="main">
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<a name="appearance" val="logisim_evolution"/>
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<a name="circuit" val="main"/>
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<a name="circuitnamedboxfixedsize" val="true"/>
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<a name="simulationFrequency" val="1.0"/>
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<comp lib="0" loc="(150,80)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="label" val="wunschEG_i"/>
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</comp>
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<comp lib="0" loc="(310,80)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="label" val="wunschOG_i"/>
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</comp>
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<comp lib="0" loc="(450,80)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="label" val="inOG_i"/>
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</comp>
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<comp lib="1" loc="(250,300)" name="NOT Gate"/>
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<comp lib="1" loc="(320,280)" name="AND Gate"/>
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<comp lib="1" loc="(320,360)" name="AND Gate"/>
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<comp lib="1" loc="(320,460)" name="AND Gate"/>
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<comp lib="1" loc="(320,540)" name="AND Gate"/>
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<comp lib="1" loc="(420,320)" name="OR Gate"/>
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<comp lib="1" loc="(430,500)" name="OR Gate"/>
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<comp lib="8" loc="(179,621)" name="Text">
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<a name="text" val="k_1'"/>
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</comp>
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<comp lib="8" loc="(252,621)" name="Text">
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<a name="text" val="k_0'"/>
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</comp>
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<comp lib="8" loc="(475,490)" name="Text">
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<a name="text" val="k_0"/>
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</comp>
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<comp lib="8" loc="(476,314)" name="Text">
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<a name="text" val="k_1"/>
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</comp>
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<wire from="(100,140)" to="(100,340)"/>
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<wire from="(100,140)" to="(330,140)"/>
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<wire from="(100,340)" to="(270,340)"/>
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<wire from="(150,80)" to="(170,80)"/>
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<wire from="(170,210)" to="(170,300)"/>
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<wire from="(170,210)" to="(470,210)"/>
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<wire from="(170,300)" to="(170,480)"/>
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<wire from="(170,300)" to="(220,300)"/>
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<wire from="(170,480)" to="(170,560)"/>
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<wire from="(170,480)" to="(270,480)"/>
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<wire from="(170,560)" to="(270,560)"/>
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<wire from="(170,80)" to="(170,110)"/>
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<wire from="(200,260)" to="(200,620)"/>
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<wire from="(200,260)" to="(270,260)"/>
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<wire from="(230,520)" to="(230,620)"/>
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<wire from="(230,520)" to="(270,520)"/>
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<wire from="(250,300)" to="(260,300)"/>
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<wire from="(260,300)" to="(260,380)"/>
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<wire from="(260,300)" to="(270,300)"/>
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<wire from="(260,380)" to="(270,380)"/>
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<wire from="(30,110)" to="(170,110)"/>
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<wire from="(30,110)" to="(30,440)"/>
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<wire from="(30,440)" to="(270,440)"/>
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<wire from="(310,80)" to="(330,80)"/>
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<wire from="(320,280)" to="(340,280)"/>
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<wire from="(320,360)" to="(340,360)"/>
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<wire from="(320,460)" to="(340,460)"/>
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<wire from="(320,540)" to="(340,540)"/>
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<wire from="(330,80)" to="(330,140)"/>
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<wire from="(340,280)" to="(340,300)"/>
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<wire from="(340,300)" to="(370,300)"/>
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<wire from="(340,340)" to="(340,360)"/>
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<wire from="(340,340)" to="(370,340)"/>
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<wire from="(340,460)" to="(340,480)"/>
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<wire from="(340,480)" to="(380,480)"/>
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<wire from="(340,520)" to="(340,540)"/>
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<wire from="(340,520)" to="(380,520)"/>
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<wire from="(420,320)" to="(500,320)"/>
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<wire from="(430,500)" to="(490,500)"/>
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<wire from="(450,80)" to="(470,80)"/>
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<wire from="(470,80)" to="(470,210)"/>
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</circuit>
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</project>
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